Highest Voted 'alu' Questions

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how does ALU work?

Implementing 8bit ALU in VHDL with unsigned numbers only. When the result of the sum is (1)00000000, 1 being the carry out, should the zero flag of the ALU be set to 1? Or the result is considered to be different from 0?

vhdl fpga alu

asked Mar 06 '12 at 17:44

Andr

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What is the general purpose computer hardware for multiplication?

I am wondering what is the cost of multiplication operation in general purpose computers in terms of clock cycles. I mean what is the hardware or algorithm for multiplication. Is it Baugh-Wooley signed multiplication algorithm or Booth's algorithm…

logic hardware cpu-architecture alu

asked Apr 30 '21 at 22:22

Oguzhan

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ALU test bench using test vector file not working

I'm new to this, and the question might seem silly, but I've spent hours on this and the test bench just doesn't want to load the right values into the register before performing the arithmetic. Here's what happens when I go to run the simulation #…

verilog hdl modelsim test-bench alu

asked Oct 23 '20 at 02:17

Pete

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Trouble implementing unsigned component to conditions of ALU in VHDL

I have to create an ALU that has conditions for add, add unsigned, sub, sub unsigned, and, or, xor, nor, slt, and slt unsigned. I am having difficulty implementing the design to include the unsigned conditions. I have noted in the code where the…

type-conversion vhdl unsigned alu

asked Apr 16 '20 at 22:31

Fabian

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Why is the ALU Opcode for lw and sw 00?

I'm trying to wrap my head around data paths and how it works in MIPS programming. A part of understating it, is understanding the ALU Opcodes that essentially tell the ALU which operations to carry out. For example, if we implement the basic AND,…

assembly mips cpu-architecture alu

asked Feb 21 '20 at 20:24

Ski Mask

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Are bigger numbers harder to divide than smaller ones?

I for one, find it more difficult dividing bigger numbers than smaller ones. I was wondering if this would be the same for the CPU. Is there any hardware which allows smaller numbers to be divided faster than larger numbers. e.g 100 / (uint8_t)…

c optimization types division alu

asked Dec 22 '19 at 10:55

Some Dinosaur

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Assembly - Carry Flag when negative minus negative

If the CPU treats the subtraction as add like this question. Then (-1) - (-2) should be FF...FF + 00...02, and the CARRY FLAG should be set. I wrote c code to test (-1) - (-2) on linux, but found the CARRY FLAG was not set. How CPU deal with this…

assembly x86 cpu alu eflags

asked Dec 01 '19 at 17:23

mingw xu

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The components of a 1-bit ALU diagram

I know that a component in VHDL is: A reusable VHDL module which can be declared with in another digital logic circuit using Component declaration of the VHDL Code. This helps to implement hierarchical design at ease. But can someone…

vhdl alu

asked May 09 '19 at 15:34

Anya Chan

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How does the srl and the sll work inside the ALU?

I have been given a project to extend a data path to implement srl and give the smaller details inside each component so i have the data path but i have no idea how the srl and the sll are chosen inside the ALU and how they are implemented as logic…

mips alu srl

asked Apr 11 '19 at 07:15

cookies78

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Does ALU know about postfix notation?

As we all know, the ALU perform Arithmetic operation, but does the computer understand post-fix notation or not?

postfix-notation alu

asked Mar 20 '19 at 14:04

Kashif Malik

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1 answer

Creating a 16-bit ALU from 16 1-bit ALUs (Structural code)

i have created the structural and the behavioral code for a 1-bit ALU,as well as a control circuit .The control circuit decides the operation that will be conducted between two variables : a,b . Here is my behavioral part of the code : library…

vhdl alu

asked May 10 '18 at 19:16

SteliosA

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Unsigned multiplication in VHDL 4bit vector?

im making an ALU with an option to do A + 2B but im having trouble getting my head around multiplying the 2B and getting the proper answer in my test bench. EG: A = 0110 B = 0011 Equation is A + 2B and im getting 0110 a snippit of my code…

vhdl multiplication unsigned alu

asked Mar 31 '17 at 13:47

Lolcatsnin

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Difficulties with my ALU in verilog

So I am designing an ALU in verilog, while I am learning it. I came up with the following code: Testbench: module ALUtb; reg clock = 1'b0; reg [0:7] val1; reg [0:7] val2; initial begin val1 = 8'b01010100; val2 = 8'b10101000; #50 $finish; end …

verilog fpga alu

asked Nov 29 '16 at 08:26

NigletDiglet

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ALU design error

I want to design an 8 bit alu in VHDL but I get this errors, I think it has something to do with the fact that my inputs are declared as bit_vectors. Is that true? ** Error: C:/Programs/Modeltech_pe_edu_10.4a/examples/alu.vhdl(19): No feasible…

vhdl bit modelsim alu

asked Nov 09 '16 at 09:02

blaa

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Digital Comparator with Carry - How to fill the table correctly?

We got a comparator which compares 4 bit binary numbers (A_3, A_2, A_1, A_0 and B_3, B_2, B_1, B_0). The result is the output signal C_i which has the value 1 if A > B. The arithmetic-circuit is supposed to be made up by connecting 4 identical 1 bit…

assembly logic cpu processor alu

asked Oct 02 '16 at 11:05

rpbudd

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Questions tagged [alu]