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Questions tagged [smp]

Symmetric multiprocessing

"Symmetric multiprocessing (SMP) involves a multiprocessor computer hardware architecture where two or more identical processors are connected to a single shared main memory and are controlled by a single OS instance. Most common multiprocessor systems today use an SMP architecture." [Source: Wikipedia.]

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nr_cpu_ids vs NR_CPUS in Linux Kernel

I am trying to understand how many processors are supported by Linux Kernel. grep NR_CPUS /boot/config-`uname -r` Will give me the maximum number of processors supported by kernel, which I can override using kernel command line parameter…
md.jamal
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Linux - Handle interrupts on another cpu

I'm trying to handle an interrupt with a group of cpus instead of the all available cpus in the system. Basically, I want CPUs 32-63 to handle an interrupt while others interrupts are handled by CPUs 0-63. If I'm not wrong, you are suppose to change…
Franks
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Using Erlang for testing.

Can I test on a computer with a single core erlang programs for four or more cores? When starting without using any parameter erlang smp assumes 2:2 like this: Erlang R14A (erts-5.8) [smp: 2:2] [rq: 2] [async-threads: 0] I am using a Pentium 4, does…
Gmp
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Python real time parallel / distributed data processing

I have a Python application that processes in-memory-data. It provides <1 second response, by querying ~1 million records and then aggregating the result set. What would be the best Python framework(s) to make this application more scalable ? Here…
ramu
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who does Napi scheduling

I had a doubt while reading about NAPI scheduling in Network drivers. Typically, entire network processing code runs in softirq context. And with NAPI polling mechanism the driver will poll for packets after interrupt arrives. So, if NAPI code also…
Haswell
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CPU affinity in Linux 3.19

I have a problem setting CPU affinity on a number of kernel threads. The kernel is a variant of 3.19 (with SMP 100Hz) on a 6 core Intel with hyper-threading disabled. I have set isolcpus=1-5. The aim is to have these cores in dyntick mode (with RCU…
toomanychushki
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Can't start SMP AP processors in MINIX: startup_IPI restarts and hangs

i'm running minix 3.1.2a ,my goal is to start APs procesoors other than the BSP ,i followed the universal startup algorithm : BSP sends AP an INIT IPI BSP DELAYs (10mSec) BSP sends AP a STARTUP IPI BSP DELAYs (200μSEC) BSP sends AP a STARTUP…
user2963216
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Processor affinity settings for Linux kernel modules?

In Windows, I can set the processor affinity of driver code using KeSetSystemAffinityThread, and check which processor my code is running on using KeGetCurrentProcessorNumber. I'm trying to do something similar in a Linux kernel module, but the only…
Stephen
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Reason for getting the error on org.apache.cordova.whitelist package in my command Line Interface(CLI) created Project for platform as Android

I am trying to create a simple cordova project using the command line Interface After Plugins Release and Moving plugins to npm: April 21, 2015 as on site . https://cordova.apache.org/announcements/2015/04/21/plugins-release-and-move-to-npm.html Is…
Yamini
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Why interrupts are globally disabled before connecting ISR?

I'm going through the probe function of the following driver /drivers/net/ethernet/smsc/smsc911x.c Inside the probe function it has been commented that /* Ensure interrupts are globally disabled before connecting ISR */ …
Amit Singh Tomar
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How to start additional cores on the Raspberry Pi 2 under bare-metal?

The question is rather broad but I couldn't even find a starting point in the ARMv7 ARM, MPCore TRM, GIC architecture manual, ... So please excuse the vagueness. I have a simple bare-metal kernel for the Raspberry Pi 2 that initializes the activity…
Goswin von Brederlow
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Process Address space with multi-core Systems UMA NUMA

I have a doubt with the concept of Process address space when involving multi core processor architectures, for the case when both Processors share a common physical address space (I guess this is what they call UMA). So, if a 32 bit processor can…
RootPhoenix
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Putting powerpc 476 in spin loop in uboot

I have two core PPC476 on my SOC. On one core I am able to run linux kernel. Can anyone suggest me how I can put 2nd core in spin loop in uboot and later bring it out and map it into the linux kernel. Regards.
user2504047
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Concurrent stores seen in a consistent order

The Intel Architectures Software Developer's Manual, Aug. 2012, vol. 3A, sect. 8.2.2: Any two stores are seen in a consistent order by processors other than those performing the stores. But can this be so? The reason I ask is this: Consider a…
thb
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Why ARM Process IPI at the end of ISR

I am studying IRQ handling on Linux. I have a question, why we need to handle IPI at the end of each ISR[for SMP]. Is there something special with IPI? why not we process in do_asm_IRQ with other interrupts. Any suggestion would be appreciated. 6 …
Dongguo
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