2

The question is rather broad but I couldn't even find a starting point in the ARMv7 ARM, MPCore TRM, GIC architecture manual, ... So please excuse the vagueness.

I have a simple bare-metal kernel for the Raspberry Pi 2 that initializes the activity LED, UART0, MMU and caches and everything works. I can blink, I can output text, I can map physical pages to virtual addresses and access them. So far so good.

Now I want to start up the additional cores and there I've run into a vacuum. There aren't yet examples of how to do this short of the linux kernel, which is rather complex because it supports so many boards. And looking at the specs I can't seem to find any good starting point. So instead of tapsing around in the dark I came here. :)

So has anyone else looked into this and figured out what state the cores are on boot and reset? What boot protocol / mechanism is used to start aditional cores? The one info I have found is that this is rather SOC specific so please no examples how to do this on a Cortex-A9 or something else that isn't a RPi 2.

Goswin von Brederlow
  • 4,639
  • 13
  • 30

1 Answers1

7

On the RPi 2 all cores are started at poweron by the firmware and then wait for a start address to be written to a mailbox. When that happens they jump to the address just written. So starting additional cores are dead easy:

// wakeup stub in asm (sets up stack and calls core_main())
extern void core_wakeup(void);
typedef void (*fn)(void);
void wakeup(int num) {
    *(volatile fn *)(0x4000008C + 0x10 * num) = core_wakeup;
}

One should leave caches disabled on all cores or enable them on all core. Cache snooping only works with caches enable so any mix of enabled/disabled caches will have inconsistencies.

Goswin von Brederlow
  • 4,639
  • 13
  • 30