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I've been trying to learn 32-bit Intel x86 nasm syntax assembly on my Linux OS, and I've run into a question about the four general purpose 32-bit registers.

From what I've been thinking, eax was a 32-bit register that was supposed to be used with the 16-bit register ax, which was subdivided into ah (upper 8 bits), and al (lower 8 bits). And the same with ebx, ecx, and edx.

However after reading a quick article, I've become sort of confused.

Is the 32-bit register composed of the 16-bit register (which in turn is composed of the two 8-bit registers) with an additional 16-bits added on?

So far from what I've read on Google, all the results say is what they're used for, not their actual composition.

phuclv
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JAW1025
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2 Answers2

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You are entirely correct. Four of the general purpose-registers EAX, EBX, ECX and EDX are composed as follows (I used the accumulator in the example) :

  1. Firstly, we have the lower byte and the upper byte of the 16-bit word. So, AX = AH || AL
  2. Then, we have the 16-bit extension of AX, which forms the dword. So, EAX = EAX(31:16) || AX.
  3. (in AMD64) The dword register is then extended to a qword register. Therefore, we have RAX = RAX(63:32) || EAX.

The || operator is the concatenation operator. You should note that this rule does not apply to the other four general purpose registers, ESP, EBP, ESI and EDI.

Daniel Kamil Kozar
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  • Perfect answer, thanks for explaining the '||' operator, and also for extending the answer into AMD64. – JAW1025 Feb 04 '12 at 00:29
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    in fact the there are SP, BP, SI and DI which are the low part of ESP, EBP, ESI and EDI, and they are in turn combine with the higher 32 bits to become RSP, RBP, RSI and RDI in x86_64 – phuclv Jan 25 '14 at 16:04
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    The low byte of *every* register is accessible in 64-bit mode, e.g. `dil` is the low byte of RBP. This requires a REX prefix; without a REX prefix that same register number would mean `bh`, so `movzx r8d, bh` is not encodeable for example, nor is `test bpl, ah` – Peter Cordes Oct 27 '20 at 02:15
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As you suppose, a 32-bit register, like eax, is accessible in its most significant part, as ax and ax is itself splitted into ah and al... the same for ebx and so on...

zambotn
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  • so ax does physically reside within eax? (for example, the upper or lower 16-bits of eax is an extention, and the other half is ax) – JAW1025 Feb 04 '12 at 00:27
  • @JAW - *Everything* is an extension. At the dawn of times, the register was just `A` and contained 8 bits. – Bo Persson Feb 04 '12 at 08:36
  • @JAW1025: How they're *physically* / microarchitecturally handled depends on the CPU design. See [Why doesn't GCC use partial registers?](https://stackoverflow.com/q/41573502) / [How exactly do partial registers on Haswell/Skylake perform? Writing AL seems to have a false dependency on RAX, and AH is inconsistent](https://stackoverflow.com/q/45660139) – Peter Cordes Oct 27 '20 at 02:17