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A 64 bit general purpose register, example:RAX can be accessed via EAX(lower 32 bit), AX(lower 16 bit), AH, AL(b bits). I do have following questions;

  1. Are these (EAX/AX/AH/AL) real physical registers or a mapping/notation to access a part of RAX?

  2. What is the use of these mapping registers? I understood if we change EAX/AX/AH/AL this in turn clears the RAX and results in having a new value. so why do these mapping registers used and under what scenario it is useful.

Franc M
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    As for (1) this is an implementation detail. Depending on the CPU and state of the program, the lower parts can be kept internally in separate registers or they could be part of the same register. The difference is not observable to the programmer. (2) It's an artefact of the legacy of the x86 architecture, coming from the 8086 originally. – fuz Apr 21 '20 at 10:13
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    No, only writes to EAX zero-extend into RAX. Writes to the 16 and 8-bit partial registers merge into the old value, creating a possibly-false dependency or other effect depending on the microarchitecture. [Why doesn't GCC use partial registers?](https://stackoverflow.com/q/41573502). RAX isn't a single physical register; x86-64 CPUs do register renaming (except I think there was an in-order Atom that supported 64-bit). RAX is a single *architectural* register, though, and however sub-registers are implemented internally, if you do read RAX after writing AL you have to see the change. – Peter Cordes Apr 21 '20 at 17:03

2 Answers2

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My understanding is based on the transition from 16 to 32 bit so I cant spek for 64 bit stuff specifically but its my understanding that the microprocessor circuitry for al/ah affects only the appropriate 8 bits in the physical register circuitry and that ax is likewise hardwired on the processor to affect only the lower 16 bits. I operate with the presumption that 64 bit architecture works under the same principal although I havent done much research into 64-bit systems to be honest.

A register is of course a pile of transistors laid out in such a fashion that there are 8/16/32/64 lines which represent the bits forming the value in the register. When you read/write to AL, you are reading/writing directly to the AX registers lower 8 lines and the EAX's lower 8 lines and presumably the RAX registers lower 8 lines. Like wise AX to EAX and in all likelihood EAX to RAX.

Virtualisation techniques were introduced in the 90's to allow for 16-bit processing on intel machines operating in 32-bit protected mode using v86 mode which used mapping techniques rather than switching back between real mode and protected mode since the switching incurred significant processing penalties and multi-tasking operating systems could not effectively run both 32-bit programs and 16-bit programs at the same time.

Caveat - Im unfamilliar with writing for 64-bit machines.

Stephen Duffy
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    writing to EAX implicitly zero-extends into RAX, avoiding the false dependency or other partial-register complications you get from writing 8 or 16-bit registers. [Why do x86-64 instructions on 32-bit registers zero the upper part of the full 64-bit register?](https://stackoverflow.com/q/11177137)/. Also, vm86 mode and mode switching in general is orthogonal to use 8 / 16 / 32-bit operand-size. `movsxd rcx, ah` is valid in 64-bit mode. – Peter Cordes Apr 21 '20 at 23:42
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    off-topic: you didn't need to delete your answer on [What is the function of parentheses in MIPS?](https://stackoverflow.com/q/61352839). It had a couple minor mistakes, and skipped mentioning the general case of MIPS's addressing mode but was mostly helpful I think. – Peter Cordes Apr 21 '20 at 23:43
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1) They're mappings for RAX

2) They mostly exist for backwards compatibility with shorter word-length architectures. They're occasionally useful for bit-twiddling RAX.

nickelpro
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    2) Not exactly. If you want to store the low 8 or 16 bits of a register, you `mov [mem], ax`. Where ISAs like MIPS or ARM have an `sh` or `sth` instruction to store a 16-bit value, x86 uses a different operand-size for the same `mov` opcode. (Or a different opcode but same mnemonic for 8-bit.) 8-bit or 16-bit operand-size can also be a convenient way to implement C `uint8_t` truncating to 8-bit for free between operations. – Peter Cordes Apr 21 '20 at 23:45