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glBufferStorage has a flag GL_MAP_COHERENT_BIT, this flag has the following description:

Shared access to buffers that are simultaneously mapped for client access and are used by the server will be coherent, so long as that mapping is performed using glMapBufferRange​. That is, data written to the store by either the client or server will be immediately visible to the other with no further action taken by the application. In particular,

If you write a value in the mapped range, how is it made visible to the other party? Is this using DMA transfers via a DMA controller? Or is there another mechanism?

Tom Deseyn
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  • There may be no copying at all, e.g. [GART](https://en.wikipedia.org/wiki/Graphics_address_remapping_table) or [pinned memory](https://www.opengl.org/registry/specs/AMD/pinned_memory.txt), but there is probably more than one way to implement it. – keltar Mar 16 '16 at 10:01
  • @keltar Thanks. Do you know what Intel Graphics systems use (e.g. HD Graphics 4400). pinned memory is an API similar to glBufferStorage in my question, so it could be implemented using GART as well, right? – Tom Deseyn Mar 16 '16 at 13:06
  • Integrated graphics don't have physically separated GPU memory, so I don't think it even needs GART and can access anything directly. Unfortunately I don't know that for sure, but intel's specifications are available freely. – keltar Mar 16 '16 at 14:05
  • @keltar can you use the 'Answer the question' button? Based on your comments and some googling, It looks like GART and shared memory are the answers I was looking for! Thanks. – Tom Deseyn Mar 16 '16 at 19:28
  • It appears I was wrong and intel uses some GART-like interface too - https://bwidawsk.net/blog/index.php/2014/06/the-global-gtt-part-1/. Maybe if i'll have time I will dig it deeper and post an answer, so far my knowledge is fairly limited. – keltar Mar 18 '16 at 04:10

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