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Questions tagged [cortex-m]

For all ARM Cortex-M series cores, including M0, M0+, M1, M3, M4, M7, M23 and M33.

Please use this tag instead of other specific Cortex-M tags See: Merge ARM tags.

This tag is for questions related to the ARM Cortex-M microcontrollers.

The Cortex-M microcontrollers support the Thumb 2 instruction set, have a Nested Vector Interrupt Controller (NVIC) that allows interrupt handlers to be written purely in C without any assembly programming and is optimized for cost and power sensitive applications such as smart metering, human interface devices, automotive and industrial control systems, consumer electronics and medical instrumentation.

For a generic introduction and comparisons to other microcontroller families, see:

References:

See also:

725 questions
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Branch Offset out of Range. ARM Assembly program for printing prime numbers upto N, where N is the user input

My main source file : L0 LDR R0, =prompt BL WriteString ;print prompt BL ReadInt ;R0 = n CMP R0, #0 BGE L1 LDR R0, =res0 ; invalid input BL WriteString B L0 L1 MOV R1, #2 L2 UDIV R2, R0, R1 …
Xavior Hansa
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How Delay mechanism works in embedded EFM32

I cant see how the following code dmaking a delay? We have SysTick iterrupt which i dont know what it means. What is the meaning of SysTick_Config(CMU_ClockFreqGet(cmuClock_CORE)? Thanks. #include #include #include…
rocko445
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ARMv7-M: What happens when a instruction loads a malformed address to PC

I get a usage fault when a function returns using a pop to PC. Interestingly, the PC that gets stacked is not the POP instruction but it's some other memory location (SRAM address, instead of a flash address). When an instruction loads to PC and if…
user299582
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Is there a difference at assembly code of the based cortex m3?

For example... Are the assembly language of stm32l152 (based on cortex m3) and the assembly language of stm32f103 the same? And is the assembly language of the all mcu of the based cortex m3 the same? I know that the peripheral device is different…
jjw
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IAR compiler "stdio library"

I am using IAR embedded workbench software for ARM CORTEX M7 controller. I have already included stdio.h library and it have fopen function like this but when i am declaring my file pointer like this FILE *fpointer; Its giving me these two…
Ati
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Missing `start` lang_item when using Real-Time For the Masses

I'm trying to write a multi-threaded bare-metal application for the STM32F4Discovery using the Real-Time For the Masses (RTFM) crate. I've frankensteined together a minimal application from an example for the STM32F3Discovery board and this…
arkap
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cortex m4f havard (architecture) "programming itself" possible?

I have an STM32F446 processor (Cortex M4 with FPU, havard architecture) and I planned to build a "mini computer" (screen, keyboard) with it. Is it possible to programm assembler on the device itself and let it programm/flash itself with that code or…
Beny Benz
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How to force IAR to use desired Cortex-M0+ instructions (optimization will be disabled for this func.)

I need to force IAR tp use certain Cortex-M0+ instruction in some part of my code while codding with C. Please do not offer pure asm functions or inline asm etc. I have managed to do this for 51 instruction but could not for ; ADR, BLX, RSBS,…
Yilmaz Kircicek
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How to disable selectively BusFault exception and it's escalation to the HardFault, having others exceptions enabled?

I am trying to disable rising of BusFault exсeption for some piece of code. I suppose it's possible to make the exception rising flags, but not rising any kind of handlers. Descriprion of BFHFNMIGN bit in Programming manual (PM0214 p.230) looks…
Morriell
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shared object on Cortex-M4 strange symbols in dynsym section

i actually write a shared object loader, which loads with the gcc created shared-objects (ELF) on a cortex-m4 controller. Loading, dependency resolving and relocating etc works fine. But the shared object has some strange symbols in the .dynsym…
Andi
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FreeRTOS fat cycle issues, is there any chance I can write 512bytes with 50hz?

I raise this question during use freertos fat. The development environment using iar compiler and MCU is using the cortex-m4. I use the hal library and the contents of FreeRTOS FAT Config.h are as follows: #define BUS_4BITS 1 #define…
JMS
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ARM Cortex M0, shift buffer, bitlevel

I need a fast shift buffer bitwise on Cortex M0. It's possible using inline asm to get address of buffer static uint8_t tmp[30]; and rotate all to right with 1 position (carry)? I can't find proper guidance for gcc inline asm on M0. On PIC16,18…
user1797147
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random behavior and infinite looping in arm cortex m4

I am trying to write code to take some values as duty cycles from uart and write them to pwm outputs to drive 6 motors. PWM_Init(); UART_Init(); char x; uint32_t y; uint32_t sum[6]={0,0,0,0,0,0}; uint32_t i,j,k; while(1) { for(k = 0 ; k < 7 ;…
Fakhreldin Mohamed
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Interrupt Configuration for PF4?

we are going to assign priority 5 to the Port F then we write the following code int main() { NVIC_PRI7_R |=0☓00A00000; NVIC_EN0_R= 0☓40000000; My question is that where does this code 0☓00A00000 this code came from?
Adnan saram
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3 answers

Arm Cortex M3 - Interrupt

I am relatively new to programming on a microcontroller in assembly, so I have quite a basic question. I am using the Arm Cortex M3. What is the big advantage of using an interrupt? (reduction of power or being able to program faster code?) I would…
Sir Sy
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